CSEE 4840 Embedded System Design Spring 2022

General Information

Class meets Fridays, 1:10 - 3:40 PM in 451 CSB.

Mudd 1235 is the lab, which is filled with Linux workstations. Registered students will receive accounts on these machines and 24-hour badge access to this room.

Do the labs in pairs. Project groups should be three students or more.

Staff

Overview

Prerequisites: ELEN E3910 or COMS W3843 or the equivalent. Embedded system architecture and programming. I/O, analog and digital interfacing, and peripherals. Weekly laboratory sessions and term project on design of a microprocessor-based embedded system including at least one custom peripheral. Knowledge of C programming and digital logic required. Lab required.

The goal of this class is to introduce you to issues in hardware/software interfacing, practical microprocessor-based system design issues such as bus protocols and device drivers, and practical digital hardware design using modern logic synthesis tools. You will put all of this to use in the lab where you will be given the opportunity to implement, using a combination of C and the SystemVerilog hardware description langauge, a small embedded system.

This is a lab course done in two parts. During the first part of the class, each student will implement the same "canned" designs designed by the instructor and be given substantial guidance. These are meant as an opportunity for you to learn the development tools and basic concepts. In the second part of the class, you will divide up into teams and each will design and implement a comparable project of their own with guidance from the instructor and TAs.

This course is a capstone in which students will integrate their knowledge of digital logic, programming, and system design to produce a real system. It is intended to complement ELEN 4340, Computer Hardware Design. 4840 focuses more on system-design issues and include a large section on hardware/software integration. Students in 4840 will use gates, processors, peripherals, software, and operating systems as building blocks.

Prerequisites

CSEE 3827, Fundamentals of Computer Systems or the equivalent. You must understand digital logic design. Prior experience with hardware description languages, FPGAs, or embedded processors is not required.

COMS 3157, Advanced Programming or the l equivalent. Specifically, C programming experience. While 4840 will teach you advanced aspects of embedded C programming, you need to come in with significant C experience.

COMS W4823, Advanced Digital Logic Design. While not a formal prerequisite, you are strongly encouraged to take it. In it, you will learn advanced logic design and HDL coding, both of which are crucial to success in 4840.

Schedule

Date	Lecture	Notes	Due
Fri Jan 21	Introduction: Embedded Systems
Fri Jan 28	SystemVerilog
Fri Feb 4	Memory
Fri Feb 11	Networking, USB, and Threads Video
Thu Feb 17	(none)		Lab 1 Files
Fri Feb 18	Hardware/Software Interfaces
Fri Feb 25	The Avalon Bus		Proposal
Thu Mar 3	(none)		Lab 2 Files 16 GB SD Card Image
Fri Mar 4	Device Drivers
Fri Mar 11	Qsys and IP Core Integration Debugging
Mar 14-18	Spring Break
Thu Mar 24	(none)		Lab 3 Hardware files Software FIles Kernel Module Env.
Fri Mar 25	Sprite Graphics Line drawing example Processors, FPGAs, and ASICs (1/2) Processors, FPGAs, and ASICs (2/2) Audio Waveforms
Thu Mar 31	(none)		Design document
Fri Apr 1
Fri Apr 8	Design reviews
Fri Apr 15
Fri Apr 22
Fri Apr 29
May 12	Final Project Presentations

The Project

You'll perform a design-it-yourself project in the second half of the class. There are five deliverables for the project:

1. A short project proposal describing in broad terms what you plan to build and how you plan to build it
2. A detailed project design describing in detail the architecture of your project, both hardware and software. This should include block diagrams, memory maps, lists of registers: everything someone else would need to understand your design. You should have done some preliminary implementation work by this point to validate your design.
   Your design document should also a plan of what you intend to complete by each of the three milestones.
3. Three milestones that you set for yourself: think of 25%, 50%, and 75% completion
4. A presentation on your project to the class
5. A final project report

Project teams should be three students or more.

The Design Document

This document should explain what you're going to build and how you're going to build it, but does not not need to include code. A corrected version of this document that reflects what you actually built should end up in your final project report.

• A Sample Design Document

Include the following things:

1. A block diagram
2. A description of the algorithms your project will implement
3. Resource budgets, e.g., for on-chip memory
4. A detailed plan for the hardware/software interface: every register and bit

The Project Report

This is a critical part of the project and will be a substantial fraction of the grade.

Include the following sections:

1. An overview of your project: a revised version of your project proposal.
2. The detailed project design documents: a revised version of the project design.
3. A section listing who did what and what lessons you learned and advice for future projects
4. Complete listings of every file you wrote for the project. Include C source, SystemVerilog source, and things such as .mhs files. Don't include any file that was generated automatically.

Include all of this in a single .pdf file (don't print it out).

Also create a .tar.gz file (see the online documentation for the `tar' program to see how to create such a file. Briefly, create a file called `myfile' with the names of all the files you want to include in the archive and run tar zcf project.tar.gz `cat myfiles` to create the archive.) that just includes the files necessary to build your project, such as I did for the labs.

Projects

ANN_encryption_byLLE: Integer Vector Homomorphic Encryption Accelerator (SE) Proposal Design Report Presentation Files Enze Chen, Lanxiang Hu, and Liqin Zhang

Asteroids: Asteroids Game (SE) Report Presentation Files Ben Philip Osuri

AudioSampler: Audio recording and playback with MIDI in (AN) Proposal Design Report Presentation Files Spandan Das and Avik Dhupar

Breakout: Video Game Clone (MB) Proposal Design Report Presentation Files Wang Chen, Youfeng Chen, Zheyuan Song, and Angzi Xu

CHIP-8: (AN) Proposal Design Report Presentation Files Xin Gao, Daniel Indictor, Elysia Witham, and Yuhang Zhu

CNN: Convolutional Neural Network Accelerator (SE) Proposal Design Report Presentation Files Yanchen Liu and Minghui Zhao

CameraControl: (AN) Proposal Design Report Presentation Files Fatima Dantsoho and Michael Lanzano

DC-Motor-Controller: (AN) Proposal Design Report Presentation Files Alexandre Msellati and Ayman Talkani

Dunk-Hunt-22: (MB) Proposal Design Report Presentation Files Bryce Natter, Kristen Shaker, and Alexander Yao

FacialRecognition: (SE) Proposal Design Report Presentation Files Liam Bishop, Daniel Cooke, Felix Hanau, Ryan Kennedy, and Richard Mouradian

Invisibility-Curtain: Chromakey for fun and profit (SE) Proposal Design Report Presentation Files Abhijeet Nayak and Srivatsan Raveendran

Lightspeed: Raycasting (AN) Proposal Design Report Presentation Files Adam Carpentieri and Souryadeep Sen

MazeGame: Pac-Man? (MB) Proposal Design Report Presentation Files Jerry Lin and Feitong Qiao

Multi-Effects-Pedal: Musical Effects real-time audio processor (AN) Proposal Design Report Presentation Files Ziqian Deng, Longyi Li, Yifan Zhan, and Yuqi Zhu

New-Rally-Y: Rally-X Game (SE) Proposal Design Report Presentation Files Andrew Juang

RISCY: RISC-V Core (SE) Proposal Design Report Presentation Files Shuai Zhang

RiverRaid: River Raid Clone (MB) Proposal Design Report Presentation Files Rojan Banmali and Xinhao Su

Tetris: Tetris Clone (MB) Proposal Design Report Presentation Files Shengyue Guo, Shibo Sheng, and Zihao Wang

Touhou: 2D Bullet Dodging Game (MB) Proposal Design Report Presentation Files Xinye Jiang and Po-Cheng Liu

ViewTube: NYC Subway Data Visualizer (AN) Proposal Design Report Presentation Files Benjamin Allison, Jared Gonzales, and Lynsey Haynes

Water-Raid-Project: River Raid (MB) Proposal Design Report Presentation Files Yongmao Luo, Tristan Saidi, Jakob Stiens, and Zhaomeng Wang

YOLO-CNN: YOLO CNN based on weight quantization (SE) Proposal Design Report Presentation Files Haoran Jing, Botong Xiao, and Terry Zhang

My favorites

Resources

• Terasic's DE1-SoC Page: documentation on the DE1-SoC board (manual, schematics, etc.), demo projects
• Intel's Quartus Prime User Guides: Manuals for the Quartus Prime system (FPGA development tools)
• Intel Cyclone V SoC FPGAs: Detailed information about the main chip (a Cyclone V SE) on the DE1-SoC board

Other References

• Ueda et al. TV Game System Having Reduced Memory Needs. United States Patent #4,824,106. April 25, 1989.
• Datasheet for the sprite-based Texas Instruments TMS9918 Video Display Processor.

Recommended Texts

Mark Zwolinski. Digital System Design with SystemVerilog. Prentice-Hall, 2010. SystemVerilog is relatively new, so there are not too many books out there for it. This is one of the better ones. It focuses on the sythesizable subset of the language and also discusses test benches.

James K. Peckol. Embedded Systems: A Contemporary Design Tool. Wiley, 2008. Many embedded system books are too idiosyncratic or incomplete for my taste, but this one does a nice job covering everything from digital circuit design to interprocess communication in real-time operating systems. It only discusses the Verilog language and only in an appendix.

Links

• CSEE 4840 from Spring 2020
• CSEE 4840 from Spring 2019
• CSEE 4840 from Spring 2016
• CSEE 4840 from Spring 2015
• CSEE 4840 from Spring 2014
• CSEE 4840 from Spring 2013
• CSEE 4840 from Spring 2012
• CSEE 4840 from Spring 2011
• CSEE 4840 from Spring 2010
• CSEE 4840 from Spring 2009
• CSEE 4840 from Spring 2008
• CSEE 4840 from Spring 2007
• CSEE 4840 from Spring 2006
• Embedded System Design from Summer 2005
• CSEE 4840 from Spring 2005
• CSEE 4840 from Spring 2004

Class Policies