Columbia University
University of Southern California
synchronous Design Environment
A CAD Tool Package for Asynchronous Digital Design
Principal Developers:

Prof. Steven M. Nowick
Department of Computer Science
Columbia University
New York, NY 10027
Prof. Peter Beerel
Ming Hsieh Department of Electrical Engineering
Los Angeles, CA 90089
CaSCADE release v1.0, November 20, 2007

Columbia-maintained tools:

1. MINIMALIST, release v2.0:
A CAD Package for the Synthesis and Optimization of Asynchronous Burst-Mode Controllers

   target: asynchronous controllers

   Download the package

   Download tutorial slides (also comes with package):
      (a) core Minimalist (pt1, pt2)
      (b) MLO: back-end multi-level logic optimizer (download)
      (c) bm_decomp: front-end specification decomposition tool (download)
2. ATN_OPT Toolset, release v0.1:
A CAD Package for the Synthesis and Optimization of Robust Asynchronous Threshold Networks

   target: robust dual-rail asynchronous threshold networks

   Download the package

   Download tutorial slides (also comes with package)
3. The DES (Discrete Event System) Analyzer, release v0.1:
A Performance Analysis and Timing Verification Tool for Concurrent Digital Systems

   target: system-level performance analysis and timing verification, using Petri net models

   Download the package

   Download tutorial slides (also comes with package)

USC-maintained tools and libraries:

4. LAST Tool Package, release v0.14:
A High-Level Asynchronous Synthesis Tool for Multi-Threaded Specifications

   target: high-performance asynchronous architectures using marked graph specifications

   Download the package
5. Verilog-CSP Communication Primitives: a Macro Library, release v1.0:
A Library of Verilog Macros that Implement CSP Send/Receive Primitives -- for Designing Asynchronous Systems

   target: asynchronous architecture design, simulation, validation

   Download the package
6. High-Speed Asynchronous Pipeline Cell Library (PCHB and STFB), release v1.0:
A library of high-speed asynchronous pipeline primitives to support physical design with commercial place-and-route tools. Two supported cell types: (i) "pre-charged half-buffer" (PCHB), and (ii) "single-track full-buffer" (STFB). (Note: The cell libraries are freely available for download from MOSIS upon approved access to TSMC 0.25 micron technology files, click link here for further information.)

   target: physical design of high-performance asynchronous pipelines

   Download the package

For questions and comments related to Columbia-maintained tools, please contact Steven Nowick at (nowick at cs dot columbia dot edu).  For questions and comments related to USC-maintained tools, please contact Peter Beerel at (pabeerel at usc dot edu).  Detailed individual contacts for particular tools are indicated in the respective downloads.
The CaSCADE tool package release was made possible by generous support from NSF ITR Award No. NSF-CCR-0086036.

The development of the individual tools in CaSCADE was supported in part by the above NSF grant, and by some additional funding (see each downloaded tool individually for further information).