Office:

                Phone:  (212) 939-7056
                FAX:    (212) 666-0140

                E-mail:  nowick AT cs DOT columbia DOT edu
 

I am a Professor of Computer Science and Electrical Engineering, and chair of the Computer Engineering Program, at Columbia University.  I received a Ph.D. in Computer Science from Stanford University in 1993, and a B.A. from Yale University in 1976. My main research interests are:  the design and optimization of asynchronous and mixed-timing digital circuits and systems; networks-on-chip (NoC's); interconnection networks for shared-memory multiprocessors; computer-aided design (CAD) tools; logic synthesis; fault tolerance and reliability; encoding techniques for low-power delay-insensitive communication; and ultra-low power digital signal processors.

Short Overview of My Research (PDF): (click here) 

Detailed Research Summary (PDF): (click here) 

Research Slides:

•  "Recent Advances in Designing Clockless Digital Systems" (click here):  Introduction to asynchronous design, recent industrial developments, and overview of my research.

•  "A Low-Overhead Asynchronous Interconnection Network for GALS Chip Multiprocessors" (click here):  Integrating heterogeneous clocked processors and memories in a shared-memory parallel architecture using a high-performance low-power asynchronous interconnection network.

•  "Introduction to Mousetrap Asynchronous Pipelines" (click here):  Designing high-speed asynchronous pipelines.

•  "Robust Interfaces for Mixed-Timing Systems" (click here):  Designing robust and low-latency interface circuits for mixed-clock and mixed asynchronous/synchronous systems.

CV's:

• Short CV (journal style)

• Medium CV

• Complete CV (May 2011)

Recent Web Articles (grants and tool releases):

• Profs. Nowick and Tsividis Developing Ultra-Low Energy Continuous-Time Signal Processors"   -- story on my medium-scale NSF grant (May 2010)

• "Columbia Engineering News":  "Nowick Developing New Desktop Supercomputer"   -- story on my medium-scale NSF team grant, joint with University of Maryland (Summer 2008)

• "EE Times (Europe)"   -- article on our "CaSCADE" Asynchronous CAD Tool Release (December 2007)

• "Columbia Engineering News":  "New Information Technology"   -- cover story on my two Medium-Scale NSF ITR Awards (Fall 2000)

Asynchronous Design in the News...:

•  "Faster Chips That March to Their Own Improvised Beat (click here):   Article in the New York Times, Circuits Section (August 22, 2002). Includes an interview with Professor Nowick.

•  "It's Time for Clockless Chips (click here):   Cover story in  Technology Review Magazine (based in MIT), October 2001, vol. 104:8 (pp. 36-41).  Includes an interview with Professor Nowick.

•  "ARM And Philips' Handshake Solutions Collaborate To Develop Clockless Processor" (from ARM Ltd. web page, Oct. 2004)