My Recent Papers

  1. "REDUCING POWER DISSIPATION, DELAY, AND AREA IN LOGIC CIRCUITS BY NARROWING TRANSISTORS", IEEE Design and Test of Computers, November-December 2003, V. 20, No. 6, pp. 18-24.

  2. "SELF-TIMED CARRY-LOOKAHEAD ADDERS", with Fu-Chiung Cheng (principal author), and Michael Theobald, IEEETC, 7/00, pp. 659-672. (This is an expanded version of 3 below.)

  3. "HAZARDS, CRITICAL RACES, AND METASTABILITY", IEEETC, 6/95, pp. 754-768 Abstract The various modes of failure of asynchronous sequential logic circuits due to timing problems are considered. These are hazards, critical races and metastable states. It is shown that there is a mechanism common to all forms of hazards and to metastable states. A similar mechanism, with added complications, is shown to characterize critical races. Means for defeating various types of hazards and critical races through the use of one-sided delay constraints are introduced. A method is described for determining from a flow table situations in which metastable states may be entered. A circuit technique for defeating metastability problems in self-timed systems is presented. It is shown that the use of simulation for verifying the correctness of a circuit with given bounds on the branch delays cannot be relied upon to expose all timing problems. An example is presented that refutes the conjecture that replacing pure delays with inertial delays can only eliminate glitches.

  4. Fu-Chiung Cheng, Stephen H. Unger, Michael Theobald, Wen-Chung Cho, "Delay Insensitve Carry Lookahead Adders", Tenth Int. Conf. on VLSI Design, Jan. 4-7, 1997, Hyderabad, India, 5 pages.

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