Abstract for group Web-Server Our fabulous group intends on implementing a fabulous web server on the fabulous XESS board. In order to accomplish such a tremendous task, it will be necessary to synergize the tremendous flexibility characteristic of the Xilinx Spartan family of FPGAs in tandem with the tremendous robustness and universality of the tremendously World Wide Inter-Web. On the software plane, we will need to harness the reliability and widely accepted Transmission Control Protocol (TCP) layered over Internet Protocol (IP). In order for the most ferociously accepted browsers to viciously display our savage webpage, it will be necessary to implement the HyperText Transfer Protocol (HTTP) in our architecture. In summary, we will need to teach the MicroBlaze to speak TCP/IP and HTTP. This daunting task can only be accomplished by a great amount of meditation (with the aid of literature) and bloodshed to be partaken by we four brave souls. On the hardware front, it is imperative that we exploit the Ethernet protocol to its maximum capacity. Our plan is to load our HyperText file into the off-chip SRAM of the board to be accessed when a request over HTTP for the page is received. The OPB will communicate this request to the SRAM and the page will be packetized and transmitted according to IP through the Ethernet port and into the World Wide Web.