Luca Carloni's Publications (by year, by topic)

Luca P. Carloni - Publications

    2012

  1. H.-Y. Liu, M. Petracca, and L.P. Carloni
    Compositional System-Level Design Exploration with Planning of High-Level Synthesis

    The Proceedings of the Conference on Design, Automation and Test in Europe (DATE), 2012.

  2. N. Sturcken, E. J. O'Sullivan, N. Wang, P. Herget, B. Webb, L. T. Romankiw, M. Petracca, R. Davies, R. Fontana, G. M. Decad, I. Kymissis, A. V. Peterchev, L.P. Carloni, W.J. Gallagher, and K.L. Shepard
    A 2.5D Integrated Voltage Regulator Using Coupled Magnetic Core Inductors on Silicon Interposer Delivering 10.8A/mm2

    International Solid-State Circuits Conference (ISSCC), 2012.
  3. 2011

  4. G. Stanje, P. Miller, J. Zhu, A. Smith, O. Winn, R. Margolies, M. Gorlatova, J. Sarik, M. Szczodrak, B. Vigraham, L. P. Carloni, P. R. Kinget, I. Kymissis, and G. Zussman
    Demo: Organic Solar Cell-equipped Energy Harvesting Active Networked Tag (EnHANT) Prototypes

    Proceedings of the 5th International Conference on Embedded Networked Sensor Systems (SenSys), 2011. (Best Student Demo Award).

  5. M. Szczodrak and L. P. Carloni
    Demo: A Complete Framework for Programming Event-Driven, Self-Reconfigurable Low Power Wireless Networks

    Proceedings of the 5th International Conference on Embedded Networked Sensor Systems (SenSys), 2011.

  6. J. Chan, G. Hendry, K. Bergman, and L. P. Carloni
    Physical-Layer Modeling and System-Level Design of Chip-Scale Photonic Interconnection Networks

    IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems. Vol. 30, No. 10, October 2011.

  7. N. Concer, A. Vesco, R. Scopigno, and L.P. Carloni
    A Dynamic and Distributed TDM Slot-Scheduling Protocol for QoS-Oriented Networks-on-Chip

    The Proceedings of the International Conference on Computer Design (ICCD), 2011.

  8. R. Neill, L. P. Carloni, A. Shabarshin, V. Sigaev, and S. Tcherepanov
    Embedded Processor Virtualization for Broadband Grid Computing

    The Proceedings of the 12th IEEE/ACM International Conference on Grid Computing (Grid), 2011.

  9. N. Sturcken, M. Petracca, S. Warren, L.P. Carloni, A.V. Peterchev, and K.L. Shepard
    An Integrated Four-Phase Buck Converter Delivering 1A/mm2 with 700ps Controller Delay and Network-on-Chip Load in 45-nm SOI

    The Proceedings of the Custom Integrated Circuits Conference (CICC), 2011.

  10. H.-Y. Liu, I. Diakonikolas, M. Petracca, and L.P. Carloni
    Supervised Design Space Exploration by Compositional Approximation of Pareto Sets

    The Proceedings of the Design Automation Conference (DAC), 2011.

  11. J. Zhu, G. Stanje, R. Margolies, M. Gorlatova, J. Sarik, Z. Noorbhaiwala, P. Miller, M. Szczodrak, B. Vigraham, L. P. Carloni, P. R. Kinget, I. Kymissis, and G. Zussman
    Demo: Prototyping UWB-Enabled EnHANTS
    .
    Proceedings of the International Conference on Mobile Systems, Applications, and Services (MobiSys), 2011

  12. G. Hendry, E. Robinson, V. Gleyzer, J. Chan, L. P. Carloni, N. Bliss, and K. Bergman
    Time-Division-Multiplexed Arbitration in Silicon Nanophotonic Networks-On-Chip for High-Performance Chip Multiprocessors

    Journal of Parallel and Distributed Computing, Vol. 71, No. 5, May 2011.

  13. F. Leonardi, A. Pinto, and L.P. Carloni
    Synthesis of Distributed Execution Platforms for Cyber-Physical Systems with Applications to High-Performance Buildings

    The Proceedings of the ACM/IEEE Second International Conference on Cyber-Physical Systems (ICCPS), 2011.

  14. G. Hendry, J. Chan, L. P. Carloni, and K. Bergman
    VANDAL: A Tool for the Design Specification of Nanophotonic Networks

    The Proceedings of the Conference on Design, Automation and Test in Europe (DATE), 2011.
  15. 2010

  16. G. Hendry, E. Robinson, V. Gleyzer, J. Chan, L. P. Carloni, N. Bliss, and K. Bergman
    Circuit-Switched Memory Access in Photonic Interconnection Networks for High-Performance Embedded Computing

    The Proceedings of the ACM/IEEE Conference on High Performance Computing (SC), 2010.

  17. R. Collins and L. P. Carloni
    Flexible Filters for High-Performance Embedded Computing

    Proceedings of the Fourteenth Annual Workshop on High Performance Embedded Computing (HPEC), 2010.

  18. G. Hendry, J. Chan, S. Kamil, L. Oliker, J. Shalf, L. P. Carloni and K. Bergman
    Silicon Nanophotonic Network-On-Chip using TDM Arbitration

    18th Annual IEEE Symposium on High-Performance Interconnects (HotI), 2010.

  19. Y.J. Yoon, N. Concer, M. Petracca, and L. P. Carloni
    Virtual Channels vs. Multiple Physical Networks: A Comparative Analysis

    The Proceedings of the Design Automation Conference (DAC), 2010.

  20. N. Concer, L. Bononi, M. Soulie, R. Locatelli, and L.P. Carloni
    The Connection-then-Credit Flow Control Protocol for Heterogeneous Multi-Core Systems-on-Chip

    IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems. Vol. 29, No. 6, June 2010.

  21. R. Neill, A. Shabarshin, and L. P. Carloni
    A Heterogeneous Parallel System Running Open MPI on a Broadband Network of Embedded Set-Top Devices

    ACM International Conference on Computing Frontiers (CF), 2010.

  22. L. P. Carloni, A. B. Kahng., S. Muddu. A. Pinto, K. Samadi, and P. Sharma
    Accurate Predictive Interconnect Modeling for System-Level Design

    IEEE Transactions on Very Large Scale Integration (VLSI) Systems, Vol. 18, No. 4, April 2010.

  23. C.-H. Li, S. Sonalkar, and L.P. Carloni
    Exploiting Local Logic Structures to Optimize Multi-Core SoC Floorplanning

    The Proceedings of the Conference on Design, Automation and Test in Europe (DATE), 2010.

  24. R. Collins, B. Vellore, and L.P. Carloni
    Recursion-Driven Parallel Code Generation for Multi-Core Platforms

    The Proceedings of the Conference on Design, Automation and Test in Europe (DATE), 2010.

  25. J. Chan, G. Hendry, A. Biberman, K. Bergman and L.P. Carloni
    PhoenixSim: A Simulator for Physical-Layer Analysis of Chip-Scale Photonic Interconnection Networks

    The Proceedings of the Conference on Design, Automation and Test in Europe (DATE), 2010.
  26. 2009

  27. R. Collins and L.P. Carloni
    Flexible Filters: Load Balancing through Backpressure for Stream Programs

    Proceedings of the Ninth International Conference on Embedded Software (EMSOFT), 2009.

  28. M. Petracca, B. G. Lee, K. Bergman and L.P. Carloni
    Photonic NoCs: System-Level Design Exploration

    IEEE Micro Special Issue: Top Picks from Hot Interconnects 16, Vol. 29, No. 4, July/August 2009.

  29. N. Concer, L. Bononi, M. Soulie, R. Locatelli and L.P. Carloni
    CTC: An End-To-End Flow Control Protocol for Multi-Core Systems-on-Chip

    Proceedings of the Third International Symposium on Networks-on-Chip (NOCS), 2009.

  30. G. Hendry, S. Kamil, A. Biberman, J. Chan, B. Lee, M. Mohiyuddin, A. Jain, K. Bergman, L.P. Carloni, J. Kubiatowicz, L. Oliker and J. Shalf
    Analysis of Photonic Networks for a Chip Multi-Processor Using Scientific Applications

    Proceedings of the Third International Symposium on Networks-on-Chip (NOCS), 2009.

  31. L.P. Carloni, P. Pande and Y. Xie
    Networks-on-Chip in Emerging Interconnect Paradigms: Advantages and Challenges

    Proceedings of the Third International Symposium on Networks-on-Chip (NOCS), 2009.

  32. F. Leonardi, A. Pinto, and L.P. Carloni
    A Case Study in Distributed Deployment of Embedded Software for Camera Networks

    The Proceedings of the Conference on Design, Automation and Test in Europe (DATE), 2009.

  33. A. Pinto, L.P. Carloni, and A. Sangiovanni-Vincentelli
    A Methodology for Constraint-Driven Synthesis of On-Chip Communications

    IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems, Vol. 28, No. 3, March 2009.

  34. C.-H. Li and L.P. Carloni
    Leveraging Local Intra-Core Information to Increase Global Performance in Block-Based Design of Systems-on-Chip

    IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems, Vol. 28, No. 2, February 2009.
  35. 2008

  36. R.L. Collins and L.P. Carloni
    Topology-Based Performance Analysis and Optimization of Latency-Insensitive Systems

    IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems, Vol. 27, No. 12, December 2008.

  37. N. Concer, M. Petracca, and L.P. Carloni
    Distributed Flit-Buffer Flow Control for Networks-on-Chip

    The Proceedings of the Sixth International Conference on Hardware/Software Codesign & System Synthesis (CODES+ISSS), 2008.

  38. A. Shacham, K. Bergman, and L.P. Carloni
    Photonic Networks-on-Chip for Future Generations of Chip Multi-Processors

    IEEE Transactions on Computers, Vol. 57, No. 9, September 2008.

  39. A. Pinto, L.P. Carloni, and A. Sangiovanni-Vincentelli
    COSI: A Framework for the Design of Interconnection Networks

    IEEE Design & Test of Computers. Vol. 25, No. 5, September/October 2008.

  40. N. Bliss, K. Asanovic, K. Bergman, L. Carloni, J. Kepner, and V. Stojanovic
    Photonic Many-Core Architecture Study

    Proceedings of the Twelfth Annual Workshop on High Performance Embedded Computing (HPEC), 2008.

  41. M. Petracca, B. G. Lee, K. Bergman and L.P. Carloni
    Design Exploration of Optical Interconnection Networks for Chip Multiprocessors

    16th Annual IEEE Symposium on High-Performance Interconnects (HotI), 2008.

  42. A. Benveniste, B. Caillaud, L.P. Carloni, P. Caspi, and A.L. Sangiovanni-Vincentelli
    Composing Heterogeneous Reactive Systems

    ACM Transactions on Embedded Computing Systems, Vol. 7, No. 4, July 2008.

  43. C. Pinello, L.P. Carloni, and A.L. Sangiovanni-Vincentelli
    Fault-Tolerant Distributed Deployment of Embedded Control Software

    IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems. Vol. 27, No. 5, May 2008.

  44. M. Petracca, K. Bergman and L.P. Carloni
    Photonic Networks-on-Chip: Opportunities and Challenges

    (Invited Paper). Proceedings of the IEEE International Symposium on Circuits and Systems (ISCAS), 2008.

  45. H. Wang, M. Petracca, A. Biberman, B. G. Lee, L.P. Carloni and K. Bergman
    Nanophotonic Optical Interconnection Network Architecture for On-Chip and Off-Chip Communications

    Proceedings of the Optical Fiber Communication / National Fiber Optic Engineers Conference (OFC/NFOEC), 2008.

  46. L. P. Carloni, A. B. Kahng., S. Muddu. A. Pinto, K. Samadi, and P. Sharma
    Interconnect Modeling for Improved System-Level Design Optimization

    Proceedings of the Asia and South Pacific Design Automation Conference (ASPDAC), 2008.
  47. 2007

  48. C.-H. Li and L.P. Carloni
    Using Functional Independence Conditions to Optimize the Performance of Latency-Insensitive Systems

    The Proceedings of the International Conference on Computer-Aided Design (ICCAD), 2007.

  49. A. Pinto, L.P. Carloni, and A.L. Sangiovanni-Vincentelli
    A Communication Synthesis Infrastructure for Heterogeneous Networked Control Systems and its Application to Building Automation and Control

    Proceedings of the Seventh International Conference on Embedded Software (EMSOFT), 2007.

  50. K. Bergman and L.P. Carloni
    On-Chip Photonic Communication for High-Performance Multi-Core Processors

    Proceedings of the Eleventh Annual Workshop on High Performance Embedded Computing (HPEC), 2007. (Best Paper Award).

  51. A. Shacham, B. G. Lee, A. Biberman, K. Bergman and L.P. Carloni
    Photonic NoC for DMA Communications in Chip Multiprocessors

    15th Annual IEEE Symposium on High-Performance Interconnects (HotI), 2007.

  52. R. Collins and L. P. Carloni
    Topology-Based Optimization of Maximal Sustainable Throughput in a Latency-Insensitive System

    The Proceedings of the Design Automation Conference (DAC), 2007.

  53. A. Shacham, K. Bergman, and L. P. Carloni
    The Case for Low-Power Photonic Networks on Chip

    The Proceedings of the Design Automation Conference (DAC), 2007.

  54. C.-H. Li, R. Collins, S. Sonalkar and L. P. Carloni
    Design, Implementation, and Validation of a New Class of Interface Circuits for Latency-Insensitive Design

    Fifth ACM-IEEE International Conference on Formal Methods and Models for Codesign (MEMOCODE), 2007.

  55. A. Shacham, K. Bergman, and L. P. Carloni
    On the Design of a Photonic Network-on-Chip

    Proceedings of the First International Symposium on Networks-on-Chip (NOCS), 2007.
  56. 2006

  57. A. Benveniste, B. Caillaud, L.P. Carloni, P. Caspi, A.L. Sangiovanni-Vincentelli, and S. Tripakis
    Communication by Sampling in Time-Sensitive Distributed Systems

    Proceedings of the Sixth International Conference on Embedded Software (EMSOFT), 2006.

  58. A. Shacham, K. Bergman, and L. P. Carloni
    Maximizing GFLOPS-per-Watt: High-Bandwidth, Low Power Photonic On-Chip Networks

    Proceedings of the Third Watson Conference on Interaction between Architecture, Circuits, and Compilers (P=ac^2), 2006.

  59. A. Bonivento, L.P. Carloni and A.L. Sangiovanni-Vincentelli
    Platform Based Design for Wireless Sensor Networks.

    in Mobile Networks & Applications, Vol. 11, No. 4, August 2006

  60. L.P. Carloni, R. Passerone, A. Pinto and A.L. Sangiovanni-Vincentelli
    Languages and Tools for Hybrid Systems Design

    in Foundations and Trends. in Electronic Design Automation, Vol. 1, No. 1/2, Jul 2006.

  61. L.P. Carloni and A.L. Sangiovanni-Vincentelli
    A Framework for Modeling the Distributed Deployment of Synchronous Designs

    in Formal Methods in Systems Design - An International Journal, © Springer-Verlag, Vol. 28, No. 2, March 2006

  62. A. Pinto, L. P. Carloni, R. Passerone, and A. Sangiovanni-Vincentelli
    Interchange Formats for Hybrid Systems: Abstract Semantics

    Proceedings of the Ninth International Workshop on Hybrid Systems : Computation and Control (HSCC), LNCS 3927, © Springer-Verlag, 2006.

  63. A. Bonivento, L.P. Carloni, and A.L. Sangiovanni-Vincentelli
    Platform-Based Design of Wireless Sensor Networks for Industrial Applications

    The Proceedings of the Conference on Design, Automation and Test in Europe (DATE), 2006.

  64. L.P. Carloni
    The Role of Back-Pressure in Implementing Latency-Insensitive Systems

    Electronic Notes in Theoretical Computer Science ENTCS 146-2, Vol. 146, No. 2, January 2006
  65. 2005

  66. A. Benveniste, B. Caillaud, L.P. Carloni, and A.L. Sangiovanni-Vincentelli
    Tag Machines

    Proceedings of the Fifth International Conference on Embedded Software (EMSOFT), 2005

  67. A. Bonivento, L.P. Carloni, and A.L. Sangiovanni-Vincentelli
    Rialto: a Bridge between Description and Implementation of Control Algorithms for Wireless Sensor Networks

    Proceedings of the Fifth International Conference on Embedded Software (EMSOFT), 2005

  68. L.P. Carloni, F. De Bernardinis, C. Pinello, A.L. Sangiovanni-Vincentelli, and M. Sgroi
    Platform-Based Design for Embedded Systems

    In R. Zurawski (Ed.), "The Embedded Systems Handbook", CRC Press , 2005

  69. A. Pinto, A. Sangiovanni-Vincentelli, L. P. Carloni, and R. Passerone
    Interchange Formats for Hybrid Systems: Review and Proposal

    Proceedings of the Eight International Workshop on Hybrid Systems : Computation and Control (HSCC), 2005. LNCS 3414, © Springer-Verlag, 2005
  70. 2004

  71. A. Benveniste, B. Caillaud, L.P. Carloni, P. Caspi, and A.L. Sangiovanni-Vincentelli
    Heterogeneous Reactive Systems Modeling: Capturing Causality and the Correctness of Loosely Time-Triggered Architectures (LTTA)

    Proceedings of the Fourth International Conference on Embedded Software (EMSOFT), 2004

  72. A.L. Sangiovanni-Vincentelli, L.P. Carloni, F. De Bernardinis, and M. Sgroi
    Benefits and Challenges of Platform-Based Design

    (Invited Paper). The Proceedings of the Design Automation Conference (DAC), 2004.

  73. C. Pinello, L.P. Carloni, and A.L. Sangiovanni-Vincentelli
    Fault-Tolerant Deployment of Embedded Software for Cost-Sensitive Real-Time Feedback-Control Applications

    The Proceedings of the Conference on Design, Automation and Test in Europe (DATE), 2004.

  74. L.P. Carloni, F. De Bernardinis, A.L. Sangiovanni-Vincentelli, and M. Sgroi
    Platform-Based and Derivative Design

    In R. Zurawski (Ed.), "The Industrial Information Technology Handbook", CRC Press , 2004

  75. A. Benveniste, B. Caillaud, L.P. Carloni, P. Caspi, and A.L. Sangiovanni-Vincentelli
    Causality and Scheduling Constraints in Heterogeneous Reactive Systems Modeling

    Proceedings of the Second International Symposium (FMCO'03), LNCS 3188, © Springer-Verlag, 2004
  76. 2003

  77. A. Benveniste, L.P. Carloni, P. Caspi, and A.L. Sangiovanni-Vincentelli
    Heterogeneous Reactive Systems Modeling and Correct-by-Construction Deployment

    Proceedings of the Third International Conference on Embedded Software (EMSOFT), LNCS 2855, © Springer-Verlag, 2003

  78. L.P. Carloni and A.L. Sangiovanni-Vincentelli
    On-Chip Communication Design: Roadblocks and Avenues

    (Invited Talk - Extended Abstract)
    The Proceedings of the First IEEE/ACM/IFIP International Conference on Hardware/Software Codesign & System Synthesis (CODES+ISSS), 2003.

  79. L.P. Carloni and A.L. Sangiovanni-Vincentelli
    A Formal Modeling Framework for Deploying Synchronous Designs on Distributed Architectures

    First International Workshop on Formal Methods for Globally Asynchronous Locally Synchronous Architectures (FMGALS), 2003.

  80. L.P. Carloni and A.L. Sangiovanni-Vincentelli
    Combining Retiming and Recycling to Optimize the Performance of Synchronous Circuits

    Proceedings of the 16th Symposium on Integrated Circuits and System Design (SBCCI), 2003.

  81. L.P. Carloni, K.L. McMillan, A. Saldanha, and A.L. Sangiovanni-Vincentelli
    A Methodology for Correct-by-Construction Latency-Insensitive Design

    Reprinted (first published in 1999) as selected paper in A. Kuehlmann (Ed.), "The Best of ICCAD - 20 Years of Excellence in Computer-Aided Design", Kluwer Academic Publishers, 2003.

  82. A. Pinto, L.P. Carloni, and A.L. Sangiovanni-Vincentelli
    Efficient Synthesis of Networks On Chip

    The Proceedings of the International Conference on Computer Design (ICCD), 2003.
  83. 2002

  84. L.P. Carloni and A.L. Sangiovanni-Vincentelli
    Coping with Latency in SOC Design

    IEEE Micro, Special Issue on Systems on Chip. Vol. 22, No. 5, Sep/Oct 2002.

  85. L.P. Carloni, F. De Bernardinis, A.L. Sangiovanni-Vincentelli, and M. Sgroi
    The Art and Science of Integrated Systems Design

    (Invited Paper). In The Proceedings of the 28th European Solid-State Circuits Conference, 2002. Published also in The Proceedings of the 32th European Solid-State Device Research Conference, 2002.

  86. A. Pinto, L.P. Carloni, and A.L. Sangiovanni-Vincentelli
    Constraint-Driven Communication Synthesis

    The Proceedings of the Design Automation Conference (DAC), 2002.
  87. 2001

  88. L.P. Carloni, K.L. McMillan, and A.L. Sangiovanni-Vincentelli
    Theory of Latency-Insensitive Design

    IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems. Vol. 20, No. 9, September 2001.

  89. S. Zanella, A. Neviani, E. Zanoni, E. Charbon, P. Miliozzi, C. Guardiani, L.P. Carloni, and A. L. Sangiovanni-Vincentelli
    Modeling of Substrate Noise Injected by Digital Libraries

    Proc. Int. Symp. Quality Electronic Design, San Jose, CA, March 2001.
  90. 2000

  91. L.P. Carloni and A.L. Sangiovanni-Vincentelli
    Performance Analysis and Optimization of Latency-Insensitive Systems

    The Proceedings of the Design Automation Conference (DAC), 2000.

  92. E.I. Goldberg, L.P. Carloni, T. Villa, R. K. Brayton, and A.L. Sangiovanni-Vincentelli
    Negative Thinking in Branch-and-Bound: the Case of Unate Covering

    IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems, Vol. 19, No. 3, March 2000.
  93. 1999

  94. E. Charbon, P. Miliozzi, L.P. Carloni, A. Ferrari, and A.L. Sangiovanni-Vincentelli
    Modeling Digital Substrate Noise Injection in Mixed-Signal ICs

    IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems, Vol. 18, No. 3, March 1999.

  95. L.P. Carloni, E.I. Goldberg, T. Villa, R.K. Brayton, and A.L. Sangiovanni-Vincentelli
    Aura II: Combining Negative Thinking and Branch-and-Bound in Unate Covering Problems

    In "VLSI: Systems on a Chip" (L.M. Silveira, R. Reis, S. Devadas editors), Kluwer 1999.

  96. L.P. Carloni, K.L. McMillan, A. Saldanha, and A.L. Sangiovanni-Vincentelli
    A Methodology for Correct-by-Construction Latency-Insensitive Design

    The Proceedings of the International Conference on Computer-Aided Design (ICCAD), 1999.

  97. L.P. Carloni, K.L. McMillan, and A.L. Sangiovanni-Vincentelli
    Latency-Insensitive Protocols

    In N. Halbwachs and D. Peled, editors, Proc. of the 11th Intl. Conf. on Computer-Aided Verification (CAV), LNCS 1633, © Springer-Verlag, 1999
  98. 1998

  99. A.L. Oliveira, L.P. Carloni, T. Villa, and A.L. Sangiovanni-Vincentelli
    Exact Minimization of Binary Decision Diagrams Using Implicit Techniques

    IEEE Transactions on Computers, Vol. 47, No. 11, November 1998.
  100. 1997

  101. A.L. Oliveira, L.P. Carloni, T. Villa, and A.L. Sangiovanni-Vincentelli
    An Implicit Formulation for Exact BDD Minimization of Incompletely Specified Functions

    in "VLSI: Integrated Systems on Silicon" (R. Reis and L. Claesen editors), Chapman-Hall 1997.

  102. L.P. Carloni, P. McGeer, A. Saldanha, and A.L. Sangiovanni-Vincentelli
    Trace-Driven Logic Synthesis: Application to Power Minimization

    The Proceedings of the International Conference on Computer-Aided Design (ICCAD) , 1997.

  103. E.I. Goldberg, L.P. Carloni, T. Villa, R.K. Brayton, and A.L. Sangiovanni-Vincentelli
    Negative Thinking in Search Methods: Application to Unate Covering

    The Proceedings of the International Conference on Computer-Aided Design (ICCAD) , 1997.
  104. 1996

  105. P. Miliozzi, L.P. Carloni, E. Charbon, and A.L. Sangiovanni-Vincentelli
    SubWave: a Methodology for Modeling Digital Substrate Noise Injection in Mixed-Signal ICs

    Proceedings of the IEEE Custom Integrated Circuit Conference (CICC), 1996.