$Id: review2.txt,v 1.1 2006/02/03 00:52:12 locasto Exp $
Spring 2006 COMS 1001
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0. What is the von Neumann architecture? Detail the von Neumann architecture.

   The von Neumann architecture is the dominant organization of
    computer hardware for modern PC's. The von Neumann architecture 
    is called the "stored-program" computer because the hardware
    can be reused for different tasks by storing a new program and
    data in the memory unit. The architecture is:
     A CPU with an ALU and a CU.
     A memory capable of storing a program and the data it operates on.
     A series of other input and output devices connected to the CPU.

2. What is the precise definition of an algorithm? Why do we need
    one? How did Alan Turing contribute?

   An algorithm is a procedure for computing the solution to a problem in
    a finite number of steps. Algorithms can be described (and executed by) 
    by Turing machines. Many fundamental mathematical questions cannot be
    answered if there is no precise definition for algorithm.

3. Explain the term memory hierarchy and diagram it.
 
   [registers]                         high speed, high cost, low capacity
   [cache]                                        |
   [primary memory (RAM)]                         |
   [secondary memory (hard disk)]                 \/
   [tape, DVD, CD]                     low speed, low cost, high capacity

4. How much memory (how many memory cells) can a 32-bit machine 
    address?

    2^32 (there are 32 bits, each can have 2 different values)
    4,294,967,296

5. Explain the fetch-decode-execute cycle. How does a pipeline
    help speed up a computer?

    The fetch-decode-execute cycle is essentially the endless series of steps
     that the CPU is involved in to execute user programs and software 
     applications. A typical cycle may look like this:

     1. Fetch instruction (data in memory) pointed to by PC. Store in IR.
     2. Increment the PC. (PC=PC+4)
     3. Decode the instruction in IR.
     4. Fetch operands (any data) needed by the instruction.
     5. Execute the instruction (usually involves the ALU)
     6. Write back any results to the proper registers.
     7. Check for interrupt flag.
     8. Goto step 1.

6. Diagram a one-bit half-adder.

   It's easiest to start with the truth table and generate the circuit from
    there.

    A + B = SUM, COUT
    0   0    0     0
    0   1    1     0
    1   0    1     0
    1   1    0     1

   We notice that the SUM column corrosponds to the values for an "XOR"
    truth table, and that the COUT column is really an "AND" truth table.

   A      B
   |      |
   |      |
   +------|-------------||--\
   |      |             >>XOR>--- SUM
   |      +-------------||--/
   |      |
   |      |
   |      |
  ----------
  |        |
  |  AND   |
  \        /
   \      /
    \----/
       |
       |
      COUT

7. Explain RISC vs. CISC and the relative advantages and 
    disadvantages of each.

    RISC
      - Small instructions that execute in 1 cycle (1 clock tick)
      - Direct hardware execution
      - Issue many instructions at once
      - pipeline
      - minimal number of instructions reference memory
      - many general pupose registers


    CISC
      - complex addressing modes, many instructions reference memory
      - large number of instructions
      - usually a microcode interpretation layer
      
    CISC has a large legacy base of applications; even though RISC is
    "cleaner", wholesale abandoment of the CISC infrastructure would have
    been too expensive, so many RISC concepts were incorporated into later
    CISC chips.

10. What are the two best answers in Computer Science?

  1. It depends.
  2. 2^n