| Lecture |
Date |
Topic |
Slides |
Handouts |
Textbook Readings |
| 1 |
Sep 9 |
Introduction to the Course. Technology Trends and Challenges. Historical Perspective and References. |
pdf |
1, 2, 3
| H&P 1.1-1.6, K.2 |
| 2 |
Sep 14 |
IC Design Flow, Performance Metrics. Quantitative Principles of Computer Design. |
pdf |
|
H&P 1.7-1.11 |
| 3 |
Sep 10 |
Instruction Set Architecture Principles |
pdf |
4,5,6 |
H&P B.1-B.8, B.12 |
| 4 |
Sep 21 |
Review of Basics of Logic Design; The ISA of MIPS64; |
pdf |
|
H&P B.9-B.11 |
| 5 |
Sep 23 |
MIPS ISA; Alternative Implementations and Basic Pipelining |
pdf |
|
H&P A.1 |
| 6 |
Sep 28 |
Pipelining: Implementation & Control Hazards |
pdf |
|
H&P A.2-A.3 |
| 7 |
Sep 30 |
Pipelining: Exceptions and Multi-Cycle Operations. Case Study: the MIPS R4000 Pipeline |
pdf |
7 |
H&P A.4-A.6 |
| 8 |
Oct 5 |
Instruction-Level Parallelism Concepts and Dynamic Scheduling; Case Study: CDC 6600 Scoreboard.
|
pdf |
|
H&P A.7-A.11, 2.1 |
| 9 |
Oct 7 |
Memory Hierarchy Design: The Basics of Caches |
pdf |
|
H&P 5.1, C1, 5.3 |
| 10 |
Oct 12 |
Memory Hierarchy Design: Cache Optimization. Case Study: Intel Itanium 2; SESC slides |
pdf |
8, 9 |
H&P C.2, C.3 |
| 11 |
Oct 14 |
Dynamic Hardware Branch Prediction & Branch-Target Buffers |
pdf |
10 |
H&P 2.3, 2.9 |
| 12 |
Oct 19 |
Dynamic Scheduling with Tomasulo's Algorithm |
pdf
|
11 |
H&P 2.4, 2.5 |
| 13 |
Oct 21 |
Multiple Instruction Issue and Speculative Execution |
pdf |
|
H&P 2.6, 2.8 |
|
Oct 26 |
Special Lecture (midterm review) |
|
12 |
|
| -- |
Oct 28 |
MIDTERM EXAM |
|
|
|
| -- |
Nov 2 |
Academic Holiday
|
|
|
|
| 14 |
Nov 4 |
VLIW Processors and Compiler Techniques for ILP: Loop Unrolling and Software Pipelining |
pdf |
13,14 |
H&P 2.2, 2.7, G.1, G.2, G.3 (part) |
| 15 |
Nov 9 |
Memory Hierarchy Design: Virtual Memory
|
pdf |
|
H&P C.4 |
| 16 |
Nov 11 |
Thread-Level Parallelism (TLP) and Multithreading Architectures |
pdf |
15,16,17 |
H&P 3.5 |
| 17 |
Nov 16 |
Case Study: Intel Pentium 4 Processor |
pdf |
18,19 |
H&P 2.10 |
| 18 |
Nov 18 |
The Rise of Multi-Core Architectures |
pdf |
20 |
|
| 19 |
Nov 23 |
Parallel Architectures and Interconnection Networks |
pdf |
21 |
4.1, H.1-H.3, F.1-F.2 |
| 20 |
Nov 25 |
Cache Coherency and Memory Consistency |
pdf |
|
4.2, 4.6, H.8, H.9 |